Increasingly, modern computing devices employ solid-state, non-volatile memory, which are configured to be repetitively reprogrammed. An example of these types of memory is flash, which is comprised of a large number of floating-gate field effect transistors arranged as memory cells. Each memory cell includes a floating gate positioned over a substrate channel between source and drain regions. A thin oxide layer separates the floating gate from the substrate. The threshold level of the cell is controlled by an amount of charge that is placed on the floating gate. If the charge level is above some threshold, the cell is read to have one state, and if below that threshold, is read to have another state. The memory cells, like typical erasable programmable read only memory (EPROM) cells, but in contrast to dynamic random access memory (DRAM), retain information when power is removed.
Non-volatile storage has many advantages for a large number of applications. However, the cells in these devices have a much more limited endurance or erase/write cycles (that is, the number of times they can be reprogrammed or erased) than DRAM. A cell's storage material will deteriorate after it passes the write cycle limit, and cannot be further reprogrammed. The useful lifetime of the cell is at that point considered to have ended. Non-volatile storage devices and systems using such devices often deploy wear-leveling techniques to evenly spread the write requests across physical storage elements on the device, to avoid premature device failure due to limited endurance.